Gerbang Logika|Logic gate is the basic formation of a digital system. Logic gate operate with binary numbers, so that is also called binary logic gate. Voltage used in the logic gate is HIGH or LOW. Voltage 1 means high, while the low voltage means 0.
1. AND logic gate
AND gate is used to generate logic 1 if all inputs have a logic 1, if not it will be generated logic 0
Gambar Gerbang Logika AND
![Gerbang AND AND Gate Logic](https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjJJMm1dVNNr6Dpwa0J9SXQFXYCL1X3aXsCuLLGA17SMoF8a_1f39suIBJkr2saYogJLa3vUvMXR8GopcVWQZ_aeZYIIEGhJ6D7zeg4P6qqmUWvKkQmvDcsD4UAJTWrZ1120YAvmPTJOi4/s400/And+logic.jpg)
![tabel kebenaran gerbang and AND truth table](https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEh-0W1YknVmKuo0-hqhDXUKBBG0xq5W0gENyhZ2xI68VGGNsivNMvM-tbSxfX5_waAMiFlvdHfYWdu6muPEljcb7OBFTJqD6shLJzW48dWpf67kp90_lnMOSEwm6Ol96Gv1pgSltnJxsts/s400/Table+And+logic.jpg)
Statement for the Boolean AND Gate
A. B = Y (A and B is the same as the Y)
2. NAND Logic gate (Not AND)
NAND gate will have a 0 output when all inputs to the logic 1. vice versa if there is a logic 0 on any input on the NAND gate, the output value 1.
Gambar Gerbang Logika NAND
![gerbang Nand Nand Logic gate](https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEh7aoPQQMVJRx18dkgkUQcjZcC4UTYiCsipTwt_5fFADoUFnE1a8Hl-3hh1VbZ_3FUDHP_34Q0FNXA0eu-HvvYvZs9rz761IJWN83ru1eEM72TMGd37ped-dH721HDldIZ17hNJJE-1lAk/s400/NAND++logic.jpg)
NAND truth table
![Tabel kebenaran Nand Nand Truth table](https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEj12B0X1R-4Cdbv4q_qiKXaj-LCqGj9p9GvYJFlIUmFvlVGcfFD0PW-N1Dr8cVb8i5OtZQ1vWD2r7bOIF9jnxeM_wmNF6IZfDabwkJ1TAaZorRMULNRpCAAeq0IDows700sMhPW_qFX6gM/s400/Table+Nand+logic.jpg)
3. Or logic gate
OR gate will output 1 if one of the entries on condition 1. if the desired output value 0, then all entries must be in a state of 0.
Gambar Gerbang Logika OR
![gerbang OR Logic gate](https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjc4YzkntEbvBwG1xet88TP9vaXoqBJ4Eq8uG4_cTLKvDlq806xTafFW5kwng8Owp3A7RCGtTomrXz2tKsr2DmOejvuNKk28nk97tGcSTGBNSe4kCHz4RxrwhzpMjVYYjLXAD-pJnw3WlE/s400/Or+logic+gate.jpg)
Or truth table
![tabel OR Truth Or Logic](https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjDYO0PXJKXNr3Yq9iSeKJk_vARFkLLJALNGeuCb671Miz9K057MdhykT6i1796yBcRHn9Ib6DgDImo5YiR0_GTJ8HTSQhGedJwovBZkpqeqKtHB9CYp4fx8Z4E2WvRZsMB5IOjF5EfSSM/s400/Table+or+logic.jpg)
4. NOR Logic gate
NOR gate will output 0 if one of the masukannya
condition 1. if the desired output value 1, then all must be in circumstances masukannya 0.
Gambar Gerbang Logika NOR
![gerbang Nor x-or logic gate](https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjxFd6JysZKw2gFUlOjY-4k_JgIMdkc6Arz1oFswDdHI5asBec_cuu68bYYpmdofGLX1ntBydTLE7NXJhOOMpDBAXYXbCpQMWrYSxVYk5xA_D3l6yBGinB0dE1m_gpbstIqiiBvhGOJ6IY/s400/X+or+Logic%5D.jpg)
NOR truth table
![tabel Nor X-or logic](https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEi54R3jaJwoNHTcvnCq1aqamzTwguToFaIBqjWk3B9zYk8CL8o4VAA49gTg-8pfRFi4Bo9Spp0Zf0ClMvfe3c6KhSEQp-2lo98ZkPVl0F8niY-AKY0oMwmAPDGTHHOFCEu5Mx7VFqsjQPA/s400/X+or+table++Logic.jpg)
5. NOR Logic gate
XOR gate (exclusive OR of the word) will give the output 1 if its input have a different situation.
Gambar Gerbang Logika NOR
![Gerbang xor XOR](https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhMLujmcbqNIYdimD7rodbKJSZqKaPXUUu5VJ07fL2w2x3VctIbtBw9bhKRj7ttQIj8WfOO6Jb0pC1OLD26x8VH4EtG_0GxExZlppomIAWPJfeFVFBqQ-L1GTjlEFYxEoGn16c5tHpE4a0/s400/X+or+logic+gate.jpg)
XOR Truth Table
![Tabel XOR Table Nor](https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhqpTcASohEtGcCscMeBZ4p3I6clHe_CtVuU7FR9RV034pbOyseZeN8_3MATYXtHLQg-v-3PkH2QRBZ_aYJwa2GKzAvIiFnc5x6y_Ttu_FijhPOJJ4qoEgnvZBAhaKiqTBdnvxd5oy-wtg/s400/X+or+table++Logic.jpg)
5. NOT Logic gate
Not truth table
![Tabel Not Table Not](https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgDlkOFv1aGXKEV8VFslMUtQLCUoityt6Qu8Tp8p11-78RxZj4CgOgWMq3nnwX7h2PLcBPrBz3AtyPyozGQBTo3etnMFm2Uf55SXRoQbu7GsctgZe8HdcVSt26U5lB3uKpvJpiexBukzPE/s400/Table+NOT.jpg)
Gambar Gerbang Logika NAND
![gerbang Nand Nand Logic gate](https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEh7aoPQQMVJRx18dkgkUQcjZcC4UTYiCsipTwt_5fFADoUFnE1a8Hl-3hh1VbZ_3FUDHP_34Q0FNXA0eu-HvvYvZs9rz761IJWN83ru1eEM72TMGd37ped-dH721HDldIZ17hNJJE-1lAk/s400/NAND++logic.jpg)
NAND truth table
![Tabel kebenaran Nand Nand Truth table](https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEj12B0X1R-4Cdbv4q_qiKXaj-LCqGj9p9GvYJFlIUmFvlVGcfFD0PW-N1Dr8cVb8i5OtZQ1vWD2r7bOIF9jnxeM_wmNF6IZfDabwkJ1TAaZorRMULNRpCAAeq0IDows700sMhPW_qFX6gM/s400/Table+Nand+logic.jpg)
3. Or logic gate
OR gate will output 1 if one of the entries on condition 1. if the desired output value 0, then all entries must be in a state of 0.
Gambar Gerbang Logika OR
![gerbang OR Logic gate](https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjc4YzkntEbvBwG1xet88TP9vaXoqBJ4Eq8uG4_cTLKvDlq806xTafFW5kwng8Owp3A7RCGtTomrXz2tKsr2DmOejvuNKk28nk97tGcSTGBNSe4kCHz4RxrwhzpMjVYYjLXAD-pJnw3WlE/s400/Or+logic+gate.jpg)
Or truth table
![tabel OR Truth Or Logic](https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjDYO0PXJKXNr3Yq9iSeKJk_vARFkLLJALNGeuCb671Miz9K057MdhykT6i1796yBcRHn9Ib6DgDImo5YiR0_GTJ8HTSQhGedJwovBZkpqeqKtHB9CYp4fx8Z4E2WvRZsMB5IOjF5EfSSM/s400/Table+or+logic.jpg)
4. NOR Logic gate
NOR gate will output 0 if one of the masukannya
condition 1. if the desired output value 1, then all must be in circumstances masukannya 0.
Gambar Gerbang Logika NOR
![gerbang Nor x-or logic gate](https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjxFd6JysZKw2gFUlOjY-4k_JgIMdkc6Arz1oFswDdHI5asBec_cuu68bYYpmdofGLX1ntBydTLE7NXJhOOMpDBAXYXbCpQMWrYSxVYk5xA_D3l6yBGinB0dE1m_gpbstIqiiBvhGOJ6IY/s400/X+or+Logic%5D.jpg)
NOR truth table
![tabel Nor X-or logic](https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEi54R3jaJwoNHTcvnCq1aqamzTwguToFaIBqjWk3B9zYk8CL8o4VAA49gTg-8pfRFi4Bo9Spp0Zf0ClMvfe3c6KhSEQp-2lo98ZkPVl0F8niY-AKY0oMwmAPDGTHHOFCEu5Mx7VFqsjQPA/s400/X+or+table++Logic.jpg)
5. NOR Logic gate
XOR gate (exclusive OR of the word) will give the output 1 if its input have a different situation.
Gambar Gerbang Logika NOR
![Gerbang xor XOR](https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhMLujmcbqNIYdimD7rodbKJSZqKaPXUUu5VJ07fL2w2x3VctIbtBw9bhKRj7ttQIj8WfOO6Jb0pC1OLD26x8VH4EtG_0GxExZlppomIAWPJfeFVFBqQ-L1GTjlEFYxEoGn16c5tHpE4a0/s400/X+or+logic+gate.jpg)
XOR Truth Table
![Tabel XOR Table Nor](https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhqpTcASohEtGcCscMeBZ4p3I6clHe_CtVuU7FR9RV034pbOyseZeN8_3MATYXtHLQg-v-3PkH2QRBZ_aYJwa2GKzAvIiFnc5x6y_Ttu_FijhPOJJ4qoEgnvZBAhaKiqTBdnvxd5oy-wtg/s400/X+or+table++Logic.jpg)
5. NOT Logic gate
NOT gate is a gate that has an input and output. NOT gate function as a commutator (inverter), so that the output of this gate is the inverse of its input.
Gambar. Lambang Gerbang Logika NOT
![Gerbang Not Not Gate](https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhV0Y82asqQoGW_hYaVlah5riRBEXBrU9qHzcNnRGBrJgWy7t0r9gSGNJXb1OghvpHP1pRx0jpya3lNn4H51PvNCImuHbeBdp6a9mgMiaKrjKfxkWabzNErJfprbP6qjrFlb9nGA7klRRA/s400/NOT+gate+logic.jpg)
Gambar. Lambang Gerbang Logika NOT
![Gerbang Not Not Gate](https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhV0Y82asqQoGW_hYaVlah5riRBEXBrU9qHzcNnRGBrJgWy7t0r9gSGNJXb1OghvpHP1pRx0jpya3lNn4H51PvNCImuHbeBdp6a9mgMiaKrjKfxkWabzNErJfprbP6qjrFlb9nGA7klRRA/s400/NOT+gate+logic.jpg)
Not truth table
![Tabel Not Table Not](https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgDlkOFv1aGXKEV8VFslMUtQLCUoityt6Qu8Tp8p11-78RxZj4CgOgWMq3nnwX7h2PLcBPrBz3AtyPyozGQBTo3etnMFm2Uf55SXRoQbu7GsctgZe8HdcVSt26U5lB3uKpvJpiexBukzPE/s400/Table+NOT.jpg)
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